Code 22 fix?
Anonymous
20 Aug 2005 0:37:01 UTC
Topic 13082
(moderation:
No, running without graphics shouldn't be a problem.
However it seems that our SSE detection reports SSE to be present while the CPU gives an "illegal instruction" when executing our code. This is most likely a problem of our App which hasn't shown up during the Beta Testing. Thanks a lot for your report!
What CPU are you running it on?
Quote:
PS How do I find this post again to see if it is answered Is there an easy way?
Probably the easiest is to subscribe to the thread you created. You will get emailed when someone posts to it with, I think, a link you can simply click on.
BM
Code 22 fix?
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Wurgl: Not really the same. Your CPU has been (correctly) detected as "CPU type 0" (see stderr output), which means that the App should use the generic version of the code. It already crashed in CreateDemodParams() which is quite a bit earlier than TestLALDemod(). I'm not sure yet if this is a problem of our App or the machine, I'll need to dig a bit deeper there.
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Gary: Thanks, I should have
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Gary:
Thanks, I should have seen this myself (still jetlagged, apparently).
Cadeus:
Figures, I found a machine here which has the same problem - and the same CPU. Most likely the gcc-4 compiler (falsely) generates SSE2 code, but we only look for SSE. So this should be a problem on all machines which have SSE, but not SSE2, like the PIII. Watch out for the next Linux Beta App, I'll post a message here, too.
Wurgl:
Can it be that with "-mfpmath=sse -march=pentium3" the gcc-4.0 actually includes SSE2 instructions, or at least requires a later version of P III than Coppermine?
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Sorry that it took us so long
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Sorry that it took us so long - it's holiday time and we are still quite busy...
Anyway: Please check out our Beta Test Page. Ther you'll find an App which allows to manually override the CPU detection and force it to use generic code.
From the whole pool of machines we have I only know of precisely two machines (PIII Coppermine) which have the SSE bit set in the CPUID feature bitmask but file a "signal 4" (illegal instruction) when actually executing SSE instructions. One of these is located at the AEI and has definietly gotten too hot a while ago. Might be some sort of temperature instability. Anyway, if you run into problems, check this out.
BM
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RE: Can you set the
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Thanks for spotting this! - done.
The softlink is in BOINC/slots/0 , so ../../ referrs back to BOINC/
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